Invention Grant
- Patent Title: Method of forming semiconductor device having self-aligned plug
- Patent Title (中): 形成具有自对准插头的半导体器件的方法
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Application No.: US13942149Application Date: 2013-07-15
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Publication No.: US08790976B2Publication Date: 2014-07-29
- Inventor: Gyu-Hwan Oh , Sung-Lae Cho , Byoung-Jae Bae , Ik-Soo Kim , Dong-Hyun Im , Doo-Hwan Park , Kyoung-Ha Eom , Sung-Un Kwon , Chul-Ho Shin , Sang-Sup Jeong
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, PA
- Priority: KR10-2010-0077087 20100811; KR10-2011-0010185 20110201
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug.
Public/Granted literature
- US20130302966A1 Method of Forming Semiconductor Device Having Self-Aligned Plug Public/Granted day:2013-11-14
Information query
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