发明授权
US08726220B2 System and methods for converting planar design to FinFET design
有权
将平面设计转换为FinFET设计的系统和方法
- 专利标题： System and methods for converting planar design to FinFET design
- 专利标题（中）： 将平面设计转换为FinFET设计的系统和方法
-
申请号： US13416742申请日： 2012-03-09
-
公开(公告)号： US08726220B2公开(公告)日： 2014-05-13
- 发明人: Yi-Tang Lin , Cheok-Kei Lei , Shu-Yu Chen , Yu-Ning Chang , Hsiao-Hui Chen , Chih-Sheng Chang , Chien-Wen Chen , Clement Hsingjen Wann
- 申请人： Yi-Tang Lin , Cheok-Kei Lei , Shu-Yu Chen , Yu-Ning Chang , Hsiao-Hui Chen , Chih-Sheng Chang , Chien-Wen Chen , Clement Hsingjen Wann
- 申请人地址： TW
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW
- 代理机构： Lowe Hauptman & Ham LLP
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. The planar layout is analyzed and corresponding FinFET structures are generated in a matching fashion. The resulting FinFET structures are then optimized. Dummy patterns and a new metal layer may be generated before the FinFET layout is verified and outputted.
公开/授权文献
信息查询
