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发明授权
US08461687B2 Semiconductor devices including bit line contact plug and buried channel array transistor, and semiconductor modules, electronic circuit boards and electronic systems including the same 有权
包括位线接触插头和掩埋沟道阵列晶体管的半导体器件，以及包括其的电子电路板和电子系统的半导体模块

Semiconductor devices including bit line contact plug and buried channel array transistor, and semiconductor modules, electronic circuit boards and electronic systems including the same
摘要：
A semiconductor device having a cell area and a peripheral area includes a semiconductor substrate, a cell insulating isolation region delimiting a cell active region of the semiconductor substrate in the cell area, a word line disposed within the semiconductor substrate in the cell area, a bit line contact plug disposed on the cell active region, a bit line disposed on the bit line contact plug, a peripheral insulating isolation region delimiting a peripheral active region of the semiconductor substrate in the peripheral area, and a peripheral transistor including a peripheral transistor lower electrode and a peripheral transistor upper electrode. The bit line contact plug is formed at the same level in the semiconductor device as the peripheral transistor lower electrode, and the bit line electrode is formed at the same level in the semiconductor device as the peripheral transistor upper electrode.
摘要（中）：

具有单元区域和周边区域的半导体器件包括半导体基板，限定单元区域中的半导体基板的单元有源区域的单元绝缘隔离区域，设置在单元区域中的半导体基板内的字线，位 设置在单元有源区上的线接触插塞，位线接触插头上的位线，限定周边区域中的半导体衬底的周边有源区域的外围绝缘隔离区域以及包括周边晶体管下电极的外围晶体管 和周边晶体管上电极。 位线接触插塞形成在半导体器件中与外围晶体管下电极相同的电平上，并且位线电极在半导体器件中形成为与外围晶体管上电极相同的电平。

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