Method and apparatus for transferring data in a memory. A semiconductor memory includes a plurality of memory cells each having a resistive sense element (RSE) in series with a switching device. A conductive word line extends in a first direction adjacent the memory cells and is connected to a gate structure of each of the switching devices. A plurality of conductive bit lines extend in a second direction adjacent the memory cells, each bit line providing a connection node that interconnects a respective pair of the memory cells. A control circuit senses a programmed state of a selected memory cell by setting each of the bit lines on a first side of the selected memory cell to a first voltage level, setting each of the remaining bit lines on an opposing second side of the selected memory cell to a second voltage level, and setting the word line to a third voltage level.