发明授权
- 专利标题: Interfacial barrier for work function modification of high performance CMOS devices
- 专利标题(中): 高性能CMOS器件功能修改界面屏障
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申请号: US12488569申请日: 2009-06-21
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公开(公告)号: US08178939B2公开(公告)日: 2012-05-15
- 发明人: Wei-Yip Loh , Prashant Majhi , Brian Coss
- 申请人: Wei-Yip Loh , Prashant Majhi , Brian Coss
- 申请人地址: US TX Austin
- 专利权人: Sematech, Inc.
- 当前专利权人: Sematech, Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: Fulbright & Jaworski L.L.P.
- 主分类号: H01L29/47
- IPC分类号: H01L29/47 ; H01L29/788 ; H01L29/94 ; H01L29/76 ; H01L29/78
摘要:
A semiconductor structure may include a semiconductor bulk region with a gate stack on the semiconductor bulk region. The source region and the drain region in the semiconductor bulk region may be located on opposing sides of a channel region below the gate stack. An interfacial layer coupled to the channel region may modify a workfunction of a metal-semiconductor contact. In a MOSFET, the metal-semiconductor contact may be between a metal contact and the source region and the drain region. In a Schottky barrier-MOSFET, the metal-semiconductor contact may be between a silicide region in the source region and/or the drain region and the channel region. The interfacial layer may use a dielectric-dipole mitigated scheme and may include a conducting layer and a dielectric layer. The dielectric layer may include lanthanum oxide or aluminum oxide used to tune the workfunction of the metal-semiconductor contact.
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