发明授权
- 专利标题： Integrated circuit packaging system with through via die having pedestal and recess and method of manufacture thereof
- 专利标题（中）： 具有通孔的集成电路封装系统，具有基座和凹槽及其制造方法
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申请号： US12486271申请日： 2009-06-17
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公开(公告)号： US08119447B2公开(公告)日： 2012-02-21
- 发明人: Reza Argenty Pagaila , Byung Tai Do , Linda Pei Ee Chua
- 申请人： Reza Argenty Pagaila , Byung Tai Do , Linda Pei Ee Chua
- 申请人地址： SG Singapore
- 专利权人： Stats Chippac Ltd.
- 当前专利权人： Stats Chippac Ltd.
- 当前专利权人地址： SG Singapore
- 代理商 Mikio Ishimaru
- 主分类号： H01L21/44
- IPC分类号： H01L21/44 ; H01L21/48 ; H01L21/50 ; H01L23/34 ; H01L23/48
摘要：
A method of manufacture of an integrated circuit packaging system includes: providing a structure having a via filled with conductive material completely through the structure, a recess, and a pedestal portion bordering the recess; mounting a semiconductor device inside the recess in the structure; and encapsulating the structure and the semiconductor device in an encapsulation.
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