发明授权
US07572726B2 Method of forming a bond pad on an I/C chip and resulting structure
有权
在I / C芯片上形成接合焊盘的方法和结构
- 专利标题: Method of forming a bond pad on an I/C chip and resulting structure
- 专利标题(中): 在I / C芯片上形成接合焊盘的方法和结构
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申请号: US11271760申请日: 2005-11-10
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公开(公告)号: US07572726B2公开(公告)日: 2009-08-11
- 发明人: Julie C. Biggs , Tien-Jen Cheng , David E. Eichstadt , Lisa A. Fanti , Jonathan H. Griffith , Randolph F. Knarr , Sarah H. Knickerbocker , Kevin S. Petrarca , Roger A. Quon , Wolfgang Sauter , Kamalesh K. Srivastava , Richard P. Volant
- 申请人: Julie C. Biggs , Tien-Jen Cheng , David E. Eichstadt , Lisa A. Fanti , Jonathan H. Griffith , Randolph F. Knarr , Sarah H. Knickerbocker , Kevin S. Petrarca , Roger A. Quon , Wolfgang Sauter , Kamalesh K. Srivastava , Richard P. Volant
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Driggs, Hogg, Daugherty & Del Zoppo Co., LPA
- 代理商 Patrick J. Daugherty
- 主分类号: H01L21/44
- IPC分类号: H01L21/44
摘要:
A method of forming wire bonds in (I/C) chips comprising: providing an I/C chip having a conductive pad for a wire bond with at least one layer of dielectric material overlying the pad; forming an opening through the dielectric material exposing a portion of said pad. Forming at least a first conductive layer on the exposed surface of the pad and on the surface of the opening. Forming a seed layer on the first conductive layer; applying a photoresist over the seed layer; exposing and developing the photoresist revealing the surface of the seed layer surrounding the opening; removing the exposed seed layer; removing the photoresist material in the opening revealing the seed layer. Plating at least one second layer of conductive material on the seed layer in the opening, and removing the first conductive layer on the dielectric layer around the opening. The invention also includes the resulting structure.
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