Invention Grant
- Patent Title: Line layout structure of semiconductor memory device
- Patent Title (中): 半导体存储器件的线路布局结构
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Application No.: US11281837Application Date: 2005-11-17
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Publication No.: US07436078B2Publication Date: 2008-10-14
- Inventor: Hyang-Ja Yang , Kang-Young Kim
- Applicant: Hyang-Ja Yang , Kang-Young Kim
- Applicant Address: KR Suwon-Si
- Assignee: Samsung Electronics Co., Ltd
- Current Assignee: Samsung Electronics Co., Ltd
- Current Assignee Address: KR Suwon-Si
- Agency: F. Chau & Associates, LLC.
- Priority: KR10-2004-0094435 20041118
- Main IPC: H01L23/58
- IPC: H01L23/58

Abstract:
An apparatus including a trolling motor having at least one operational subsystem and the trolling motor also having an integral electronic controller for controlling the operational subsystem wherein the improvement comprises an integral electronic diagnostic system which will receive diagnostic information from the operational subsystem and will transmit the diagnostic information for reception externally of the trolling motor.
Public/Granted literature
- US20060118958A1 Line layout structure of semiconductor memory device Public/Granted day:2006-06-08
Information query
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