Invention Grant
US07310278B2 Method and apparatus for in-system redundant array repair on integrated circuits
失效
用于集成电路系统内冗余阵列修复的方法和装置
- Patent Title: Method and apparatus for in-system redundant array repair on integrated circuits
- Patent Title (中): 用于集成电路系统内冗余阵列修复的方法和装置
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Application No.: US11418052Application Date: 2006-05-04
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Publication No.: US07310278B2Publication Date: 2007-12-18
- Inventor: Arthur A. Bright , Paul G. Crumley , Marc B. Dombrowa , Steven M. Douskey , Rudolf A. Haring , Steven F. Oakland , Michael R. Ouellette , Scott A. Strissel
- Applicant: Arthur A. Bright , Paul G. Crumley , Marc B. Dombrowa , Steven M. Douskey , Rudolf A. Haring , Steven F. Oakland , Michael R. Ouellette , Scott A. Strissel
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Daniel P. Morris, Esq.
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C7/10 ; G11C17/18 ; H03K19/00

Abstract:
Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.
Public/Granted literature
- US20070258296A1 METHOD AND APPARATUS FOR IN-SYSTEM REDUNDANT ARRAY REPAIR ON INTEGRATED CIRCUITS Public/Granted day:2007-11-08
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