A semiconductor memory device comprises word lines, bit lines, memory cells, a row decoder, a column decoder, and a write circuit. The word lines are formed along a first direction. The bit lines are formed along a second direction. Memory cells include magneto-resistive elements and are arranged at intersections of the word lines and the bit lines. The row decoder selects at least one of the word lines. The column decoder selects at least one of the bit lines. The write circuit supplies first and second write currents to a selected word line and selected bit line respectively and writes data into a selected memory cell arranged at the intersection of the selected word line and the selected bit line. The write circuit changes the current values of the first and second write currents according to a temperature change.