Invention Grant
- Patent Title: Method and circuit for adjusting the timing of output data based on an operational mode of output drivers
-
Application No.: US10944136Application Date: 2004-09-16
-
Publication No.: US06975149B2Publication Date: 2005-12-13
- Inventor: Vladimir Mikhalev , Aaron M. Schoenfeld , Daniel B. Penney , William C. Waldrop
- Applicant: Vladimir Mikhalev , Aaron M. Schoenfeld , Daniel B. Penney , William C. Waldrop
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C7/10
- IPC: G11C7/10 ; H03L7/081 ; H03L7/06

Abstract:
A delay-locked loop adjusts a delay of a clock signal that is generated in response to an external clock signal. The clock signal is applied to an output buffer to clock the buffer so that data or clock signals from the buffer are synchronized with the external clock signal. The output buffer operates in a full-drive and reduced-drive mode in response to an output drive strength bit having first and second logic states, respectively. The delay-locked loop adjusts the delay of the clock signal in response to the state of the output drive strength bit to keep the data or clock signals from the buffer synchronized during both modes of operation.
Public/Granted literature
Information query