发明授权
US06851045B2 Microprocessor having delayed instructions with variable delay times for executing branch instructions
失效
具有延迟指令的微处理器，具有用于执行分支指令的可变延迟时间
- 专利标题： Microprocessor having delayed instructions with variable delay times for executing branch instructions
- 专利标题（中）： 具有延迟指令的微处理器，具有用于执行分支指令的可变延迟时间
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申请号： US09116260申请日： 1998-07-16
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公开(公告)号： US06851045B2公开(公告)日： 2005-02-01
- 发明人: Edgar Holmann , Toyohiko Yoshida
- 申请人： Edgar Holmann , Toyohiko Yoshida
- 申请人地址： JP Tokyo
- 专利权人： Renesas Technology Corp.
- 当前专利权人： Renesas Technology Corp.
- 当前专利权人地址： JP Tokyo
- 代理机构： Burns, Doane, Swecker & Mathis, L.L.P.
- 优先权： JP96-203675 19960801
- 主分类号： G06F9/30
- IPC分类号： G06F9/30 ; G06F9/318 ; G06F9/32 ; G06F9/38 ; G06F13/00
摘要：
A microprocessor including an instruction decoder for decoding a branch instruction to output a decoded result, a program counter, and a program counter controller for controlling the program counter on the basis of the decoded result. The program counter controller includes a first register for storing a first program counter value output from the instruction decoder. The program counter controller detects a coincidence of the first program counter value stored in the first register with a value of the program counter to set a second program counter value indicating a branch target of the branch instruction into the program counter.
公开/授权文献
- US20010013095A1 MICROPROCESSOR HAVING DELAYED INSTRUCTIONS 公开/授权日：2001-08-09
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