发明授权
- 专利标题： Semiconductor integrated circuit device having an optimal circuit layout to ensure stabilization of internal source voltages without lowering circuit functions and/or operating performance
- 专利标题（中）： 具有最佳电路布局以确保内部源电压的稳定而不降低电路功能和/或操作性能的半导体集成电路器件
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申请号： US10142897申请日： 2002-05-13
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公开(公告)号： US06518835B2公开(公告)日： 2003-02-11
- 发明人: Yoshiro Riho , Kiyoshi Nakai , Hidekazu Egawa , Yukihide Suzuki , Isamu Fujii
- 申请人： Yoshiro Riho , Kiyoshi Nakai , Hidekazu Egawa , Yukihide Suzuki , Isamu Fujii
- 优先权： JP10-241607 19980827
- 主分类号： H01L2500
- IPC分类号： H01L2500
摘要：
In a semiconductor integrated circuit device which comprises a first interconnect channel including a plurality of second-layer metal interconnect layers extended in a first direction over a semiconductor chip, a second interconnect channel including a plurality of, third-layer metal interconnect layers extended in a second direction perpendicular to the first direction, an internal power supply circuit which receives a source voltage supplied from an external terminal and generates a voltage different from the source voltage, and which is provided with stabilizing capacitors, a large part of the stabilizing capacitors are formed in an area in which the second- and third-layer metal interconnect lines intersect each other.
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