发明授权
- 专利标题: Asynchronous digital sample rate converter
- 专利标题(中): 异步数字采样率转换器
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申请号: US446036申请日: 1995-05-19
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公开(公告)号: US5666299A公开(公告)日: 1997-09-09
- 发明人: Robert W. Adams , Tom W. Kwan , Michael Coln
- 申请人: Robert W. Adams , Tom W. Kwan , Michael Coln
- 申请人地址: MA Norwood
- 专利权人: Analog Devices, Inc.
- 当前专利权人: Analog Devices, Inc.
- 当前专利权人地址: MA Norwood
- 主分类号: H03H17/00
- IPC分类号: H03H17/00 ; H03H17/02 ; H03H17/06 ; G06F7/38 ; G06F17/10 ; G06F17/17
摘要:
An asynchronous digital sample rate converter includes a random access memory for storing input data values and a read only memory for storing a reduced set of interpolation filter coefficients. Input data is written to the random access memory at the input sample rate. Output samples are provided from a multiply/accumulate engine which given a stream of input data and filter coefficients produces an output sample upon request at the output frequency. The initial address for reading input data from the random access memory, and the addresses for coefficients from the read only memory are provided by an auto-centering scheme which is a first order closed loop system with a digital integrator fed by an approximation of the input to output sample rate ratio. This auto-centering scheme may include a feed forward low pass filter to cancel steady state error, and an interpolated write address to reduce noise. A circuit determining the output to input sample rate ratios can also be provided to scale coefficient addresses and resulting output samples to allow for decimation. This circuit includes a form of digital hysteresis to eliminate noise. The ROM coefficients are reduced by relying on the symmetry of the impulse response of the interpolation filter and by utilizing a variable step size forward and backward linear interpolation.
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