A semiconductor device has a substrate of a first conductivity type including a well of a second conductivity type opposite to the first conductivity type. The semiconductor device comprises a bias potential generating circuit for generating a potential in the substrate or the well; a potential detecting circuit for detecting a potential of the substrate or the well and a gate circuit. The gate circuit is connected to the potential detecting circuit and to an internal circuit and applies an enable signal to the internal circuit in accordance with the detected potential of the substrate or the well. Consequently, latch-up of parasitic transistors in a CMIS-inverter circuit of the semiconductor device can be prevented.