Invention Grant
US4755479A Manufacturing method of insulated gate field effect transistor using
reflowable sidewall spacers
失效
使用可回流侧壁间隔件的绝缘栅场效应晶体管的制造方法
- Patent Title: Manufacturing method of insulated gate field effect transistor using reflowable sidewall spacers
- Patent Title (中): 使用可回流侧壁间隔件的绝缘栅场效应晶体管的制造方法
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Application No.: US10667Application Date: 1987-02-04
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Publication No.: US4755479APublication Date: 1988-07-05
- Inventor: Takao Miura
- Applicant: Takao Miura
- Applicant Address: JPX Kanagawa
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JPX Kanagawa
- Priority: JPX61-033237 19860217; JPX61-033236 19860217
- Main IPC: H01L21/266
- IPC: H01L21/266 ; H01L21/3105 ; H01L21/336 ; H01L29/08 ; H01L29/78 ; H01L21/223 ; H01L21/265
Abstract:
With an increase of integration density in an integrated circuit, the channel length of MIS FET becomes shorter and shorter, which causes a hot carrier effect. To solve the problem, the doping profile of source/drain regions and doping amount must be precisely controlled such that a strong electric field is not generated in a transition region from channel to drain. To obtain this objective, the present invention discloses a method, in which reflowed sidewalls of doped silicate glass having a gentle slope are formed on both sides of a gate electrode, and the gate electrode and the sidewalls thus formed are used as a mask for ion implantation. The depth of ion implantation and the doping amount change gradually from the channel region to the drain region avoiding a generation of the strong electric field and thus alleviates the short channel trouble. The present invention has also an effect of obtaining a passivation layer having gentle slope on the surface and avoiding a broken wire trouble of aluminum wiring.
Public/Granted literature
- US6061245A Free standing, three dimensional, multi-chip, carrier package with air flow baffle Public/Granted day:2000-05-09
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