Invention Grant
US4079506A Method of preparing a dielectric-isolated substrate for semiconductor
integrated circuitries
失效
制备用于半导体集成电路的电介质隔离衬底的方法
- Patent Title: Method of preparing a dielectric-isolated substrate for semiconductor integrated circuitries
- Patent Title (中): 制备用于半导体集成电路的电介质隔离衬底的方法
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Application No.: US637959Application Date: 1975-12-05
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Publication No.: US4079506APublication Date: 1978-03-21
- Inventor: Takaya Suzuki , Seturoo Yagyuu , Akio Mimura
- Applicant: Takaya Suzuki , Seturoo Yagyuu , Akio Mimura
- Applicant Address: JA
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JA
- Priority: JA49-141555 19741211
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/762 ; H01L23/52 ; H01L21/304 ; H01L21/316
Abstract:
In the preparation of a dielectric-isolated substrate for semiconductor integrated circuits which comprises a plurality of silicon single crystalline islands in which circuit elements are formed, a region made of an alternate laminate of silicon polycrystalline layers and silicon oxide films for supporting the plurality of silicon single crystalline islands, and a silicon oxide film interposed between the silicon single crystalline islands and the support region for isolating each of the silicon single crystalline islands from the remaining ones and the support region, the formation of three to twelve silicon polycrystalline layers in the support region can remarkably reduce the bending of the substrate resulting from the growth stress of the silicon polycrystalline layers or from the difference in thermal expansion coefficients between the single crystalline silicon and the polycrystalline silicon, and therefore produces a dielectric-isolated substrate showing little bending.
Public/Granted literature
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