Invention Application
- Patent Title: INTEGRATED DEVICES WITH CONDUCTIVE BARRIER STRUCTURE
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Application No.: US18326698Application Date: 2023-05-31
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Publication No.: US20240405078A1Publication Date: 2024-12-05
- Inventor: Ujwal Radhakrishna , Yoganand Saripalli , Johan Strydom , Zhikai Tang , Dong Seup Lee
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Main IPC: H01L29/20
- IPC: H01L29/20 ; H01L29/423 ; H01L29/66 ; H01L29/778

Abstract:
The present disclosure generally relates to integrated devices with a conductive barrier structure. In an example, a semiconductor device includes a substrate, a conductive barrier structure, a channel layer, a barrier layer, a gate, and a conductive structure. The substrate is of a first semiconductor material. The conductive barrier structure is on the substrate. The channel layer is of a second semiconductor material and is on the conductive barrier structure. The barrier layer is on the channel layer, and the channel layer is between the barrier layer and the conductive barrier structure. The gate is over the barrier layer opposing the channel layer. The conductive structure is electrically coupled between the conductive barrier structure, the channel layer, and the barrier layer.
Information query
IPC分类: