- 专利标题： METHODS FOR MAKING SEMICONDUCTOR DEVICES THAT INCLUDE METAL CAP LAYERS
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申请号： US18620326申请日： 2024-03-28
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公开(公告)号： US20240363410A1公开(公告)日： 2024-10-31
- 发明人: Ryota Yonezawa , Kai-Hung Yu , Yuji Otsuki , Kenichi Imakita , Atsushi Gomi , Kohichi Satoh , Tadahiro Ishizaka , Takashi Sakuma , Hidenao Suzuki
- 申请人： Tokyo Electron Limited
- 申请人地址： JP Tokyo
- 专利权人： Tokyo Electron Limited
- 当前专利权人： Tokyo Electron Limited
- 当前专利权人地址： JP Tokyo
- 主分类号： H01L21/768
- IPC分类号： H01L21/768
摘要：
A method for forming a semiconductor device can include providing a substrate including a via in a dielectric layer, forming a ruthenium metal plug in the via, and at least part of the ruthenium metal plug can be formed directly on the dielectric layer in the via, forming a metal cap layer directly on the ruthenium metal plug, and forming a metallization layer, such as a copper-containing trench, over the ruthenium metal plug, such that the metal cap layer is between the metallization layer and the ruthenium metal plug, which can prevent intermixing of the ruthenium of the ruthenium metal plug with the metal or metals in the metallization layer.
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