A bit line sense amplifier includes a plurality of semiconductor devices including sensing transistors and selection transistors disposed side by side, and configured to sense a voltage change of a bit line and a complementary bit line, and wiring patterns connected to at least one of the plurality of semiconductor devices. The sensing transistors share a source electrode. The selection transistors may be controlled to be complementarily turned on and off. The wiring patterns include a first wiring pattern electrically connecting gate electrodes of the sensing transistors and drain electrodes of the selection transistors, and a second wiring pattern electrically connecting a gate electrode of a sensing transistor and a drain electrode of another sensing transistor.