Invention Publication
- Patent Title: INTEGRATED CIRCUIT DEVICE AND METHOD
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Application No.: US18739834Application Date: 2024-06-11
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Publication No.: US20240332174A1Publication Date: 2024-10-03
- Inventor: Cheng-Yu LIN , Jung-Chan YANG , Hui-Zhong ZHUANG , Sheng-Hsiung CHEN , Kuo-Nan YANG , Chih-Liang CHEN , Lee-Chung LU
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- The original application number of the division: US17463203 2021.08.31
- Main IPC: H01L23/528
- IPC: H01L23/528 ; G06F30/347 ; G06F30/392 ; G06F30/394 ; H01L23/50 ; H01L27/02 ; H01L27/07 ; H01L27/118 ; H01L29/417

Abstract:
An IC device includes first and second circuits adjacent each other and over a substrate. The first circuit includes a first IO pattern along a first track among a plurality of tracks in a first metal layer, the plurality of tracks elongated along a first axis and spaced from each other along a second axis. The second circuit includes a plurality of conductive patterns along corresponding different tracks among the plurality of tracks in the first metal layer, each of the plurality of conductive patterns being an IO pattern of the second circuit or a floating conductive pattern. The first metal layer further includes a first connecting pattern along the first track and connecting the first IO pattern and a second IO pattern of the second circuit. The second IO pattern is one of the plurality of conductive patterns of the second circuit and is along the first track.
Information query
IPC分类: