Invention Publication
- Patent Title: APPARATUSES AND METHODS FOR REDUCING STANDBY CURRENT IN MEMORY ARRAY ACCESS CIRCUITS
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Application No.: US18591798Application Date: 2024-02-29
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Publication No.: US20240331763A1Publication Date: 2024-10-03
- Inventor: TAKAMASA SUZUKI , NOBUO YAMAMOTO , IZUMI NAKAI
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID BOISE
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Main IPC: G11C11/4096
- IPC: G11C11/4096 ; G11C11/4074 ; G11C11/4091

Abstract:
Apparatuses and methods for reducing standby current in memory array access circuits are disclosed. An example apparatus includes a activation voltage supply line and a sense amplifier coupled to the activation voltage supply line. The sense amplifier is configured to be activated by an activation voltage provided on the activation voltage supply line. A read-write circuit is coupled to a pair of local input/output lines and a pair of global input/output lines, and further coupled to the activation voltage supply line. The read-write circuit is configured to drive the pair global input/output lines based on voltages of the pair of local input/output lines when activated for a read operation and further configured to drive the pair of local input/output lines based on voltages of the pair of global input/output lines when activated for a write operation.
Information query
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