Invention Publication
- Patent Title: LAYOUT STRUCTURE OF DIFFERENTIAL LINES, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT
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Application No.: US18306971Application Date: 2023-04-25
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Publication No.: US20240312949A1Publication Date: 2024-09-19
- Inventor: Kang-Yun Yang , Yang-Tse Hung , Chao-Cheng Ku , Li-Yuan Lee
- Applicant: PHISON ELECTRONICS CORP.
- Applicant Address: TW Miaoli
- Assignee: PHISON ELECTRONICS CORP.
- Current Assignee: PHISON ELECTRONICS CORP.
- Current Assignee Address: TW Miaoli
- Priority: TW 2110034 2023.03.17
- Main IPC: H01L23/00
- IPC: H01L23/00 ; G11C5/06 ; G11C16/14

Abstract:
A layout structure of differential lines, a memory storage device and a memory control circuit unit are provided. The layout structure of the differential lines includes a wiring layer, a first wire and a second wire. The first wire is arranged on the wiring layer and configured to transmit a first differential signal. The second wire is arranged on the wiring layer and configured to transmit a second differential signal. A first end of the first wire and a first end of the second wire are coupled to a first electrical component. A second end of the first wire and a second end of the second wire are coupled to a second electrical component. The first end of the first wire has a first bending structure. One of the second end of the first wire and the second end of the second wire has a second bending structure.
Information query
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