Invention Publication
- Patent Title: INTEGRATED CIRCUIT PACKAGES
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Application No.: US18603779Application Date: 2024-03-13
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Publication No.: US20240222307A1Publication Date: 2024-07-04
- Inventor: Chien-Hsun Chen , Shou-Yi Wang , Jiun Yi Wu , Chung-Shi Liu , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/48 ; H01L21/683 ; H01L23/31 ; H01L23/498 ; H01L23/538 ; H01L23/66 ; H01L25/18

Abstract:
In an embodiment, a device includes: a semiconductor device; and a redistribution structure including: a first dielectric layer; a first grounding feature on the first dielectric layer; a second grounding feature on the first dielectric layer; a first pair of transmission lines on the first dielectric layer, the first pair of transmission lines being laterally disposed between the first grounding feature and the second grounding feature, the first pair of transmission lines being electrically coupled to the semiconductor device; a second dielectric layer on the first grounding feature, the second grounding feature, and the first pair of transmission lines; and a third grounding feature extending laterally along and through the second dielectric layer, the third grounding feature being physically and electrically coupled to the first grounding feature and the second grounding feature, where the first pair of transmission lines extend continuously along a length of the third grounding feature.
Information query
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