- 专利标题: CONTROLLING THRESHOLD VOLTAGES THROUGH BLOCKING LAYERS
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申请号: US18608560申请日: 2024-03-18
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公开(公告)号: US20240222108A1公开(公告)日: 2024-07-04
- 发明人: Chia-Ching Lee , Chung-Chiang Wu , Shih-Hang Chiu , Hsuan-Yu Tung , Da-Yuan Lee
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsinchu
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01L21/768 ; H01L27/088 ; H01L29/66
摘要:
A method includes depositing a first work-function layer and a second work-function layer in a first device region and a second device region, respectively, and depositing a first fluorine-blocking layer and a second fluorine-blocking layer in the first device region and the second device region, respectively. The first fluorine-blocking layer is over the first work-function layer, and the second fluorine-blocking layer is over the second work-function layer. The method further includes removing the second fluorine-blocking layer, and forming a first metal-filling layer over the first fluorine-blocking layer, and a second metal-filling layer over the second work-function layer.
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