- 专利标题： SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
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申请号： US17460317申请日： 2021-08-30
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公开(公告)号： US20230065788A1公开(公告)日： 2023-03-02
- 发明人: Wei-Chung Chang , Ming-Che Ho , Hung-Jui Kuo
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsinchu
- 主分类号： H01L21/768
- IPC分类号： H01L21/768 ; H01L23/48 ; H01L25/10
摘要：
Semiconductor package includes substrate, first barrier layer, second barrier layer, routing via, first routing pattern, second routing pattern, semiconductor die. Substrate has through hole with tapered profile, wider at frontside surface than at backside surface of substrate. First barrier layer extends on backside surface. Second barrier layer extends along sidewalls of through hole and on frontside surface. Routing via fills through hole and is separated from sidewalls of through hole by at least second barrier layer. First routing pattern extends over first barrier layer on backside surface and over routing via. First routing pattern is electrically connected to end of routing via and has protrusion protruding towards end of routing via in correspondence of through hole. Second routing pattern extends over second barrier layer on frontside surface. Second routing pattern directly contacts another end of routing via. Semiconductor die is electrically connected to routing via by first routing pattern.
公开/授权文献
- US11901230B2 Semiconductor package and manufacturing method thereof 公开/授权日：2024-02-13
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