A cell array of a memory device includes: a first deck of memory cells arranged in a first row and a second row extending in a first horizontal direction and a plurality of columns extending in a second horizontal direction, wherein the memory cells in the second row in the first deck is displaced in the first horizontal direction with respect to the memory cells in the first row in the first deck; a first common word line metal track extending in the first horizontal direction, wherein both the memory cells in the first row and the memory cells in the second row are disposed on the first common word line metal track; and a plurality of first bit line metal tracks extending in the second horizontal direction, wherein each of the plurality of first bit line metal tracks is disposed on one of the first deck of memory cells.