Invention Publication
- Patent Title: Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells
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Application No.: US17727487Application Date: 2022-04-22
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Publication No.: US20230343393A1Publication Date: 2023-10-26
- Inventor: Jordan D. Greenlee , Rajasekhar Venigalla , Tom George
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G11C16/04
- IPC: G11C16/04 ; H01L23/48 ; H01L27/11519 ; H01L27/11556 ; H01L27/11565 ; H01L27/11582

Abstract:
A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers directly above a conductor tier that comprises silicon-containing material. The stack comprises laterally-spaced memory-block regions and a through-array-via (TAV) region. The stack comprises channel-material strings that extend through the first tiers and the second tiers in the memory-block regions. The stack comprises TAV openings in the TAV region that extend to the silicon-containing material of the conductor tier. A metal halide is reacted with the silicon of the silicon-containing material to deposit the metal of the metal halide in the conductor tier. After depositing the metal, conductive material is formed in the TAV openings directly against the deposited metal and therefrom a TAV is formed in individual of the TAV openings that comprises the conductive material and the deposited metal. Structure embodiments are disclosed.
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