Invention Publication
- Patent Title: TEST CIRCUIT IN CHIP AND CIRCUIT TEST METHOD
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Application No.: US18176025Application Date: 2023-02-28
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Publication No.: US20230204661A1Publication Date: 2023-06-29
- Inventor: Yu Huang , Changming Cui , Junlin Huang , Haitao Fu
- Applicant: HUAWEI TECHNOLOGIES CO., LTD.
- Applicant Address: CN Shenzhen
- Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee: HUAWEI TECHNOLOGIES CO., LTD.
- Current Assignee Address: CN Shenzhen
- Main IPC: G01R31/317
- IPC: G01R31/317 ; G01R31/3185

Abstract:
A test circuit transmits input data of a test vector to a data distribution circuit using an input of a test bus, and transmits the input data of the test vector to a scan input channel in a circuit under test using the data distribution circuit. After scan of the circuit under test is completed, output data of the test vector on a scan output channel in the circuit under test is transmitted to an output of the test bus using the data distribution circuit, to complete testing of the circuit under test. A dynamic correspondence between the data distribution circuit and the test bus may be configured based on a specific test solution, so that a test resource can be dynamically allocated.
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