Invention Application
- Patent Title: MICROELECTRONIC ASSEMBLIES WITH VIA-TRACE-VIA STRUCTURES
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Application No.: US16232898Application Date: 2018-12-26
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Publication No.: US20200211949A1Publication Date: 2020-07-02
- Inventor: Veronica Aleman Strong , Aleksandar Aleksov
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/66 ; H01L23/00 ; H01L21/48 ; H01P3/06 ; H01P11/00 ; G06F1/16

Abstract:
Disclosed herein are via-trace-via structures with improved alignment, and related devices and methods. For example, in some embodiments, an integrated circuit (IC) package substrate may include a conductive trace having a first surface and an opposing second surface; a first conductive via in a first dielectric layer, wherein the first conductive via is in contact with the first surface of the conductive trace; and a second conductive via in a second dielectric layer, wherein the second conductive via is in contact with the second surface of the conductive trace, wherein the second dielectric layer is on the first dielectric layer, and wherein the first conductive via, the second conductive via, and the conductive trace have a same width between 0.5 um and 25 um.
Information query
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