Invention Application
- Patent Title: PROCESS ENHANCEMENT USING DOUBLE SIDED EPITAXIAL ON SUBSTRATE
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Application No.: US16424235Application Date: 2019-05-28
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Publication No.: US20190296013A1Publication Date: 2019-09-26
- Inventor: James Fred Salzman , Bradley David Sucher
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/10 ; H01L27/02 ; H01L21/8238

Abstract:
Disclosed examples include semiconductor devices and fabrication methods to fabricate semiconductor wafers and integrated circuits, including forming a first epitaxial semiconductor layer of a first conductivity type on a first side of a semiconductor substrate of the first conductivity type, forming a nitride or oxide protection layer on a top side of the first epitaxial semiconductor layer, forming a second epitaxial semiconductor layer of the first conductivity type on the second side of the semiconductor substrate, and removing the protection layer from the first epitaxial semiconductor layer. The wafer can be used to fabricate an integrated circuit by forming a plurality of transistors at least partially on the first epitaxial semiconductor layer.
Public/Granted literature
- US11056490B2 Process enhancement using double sided epitaxial on substrate Public/Granted day:2021-07-06
Information query
IPC分类: