Invention Application
- Patent Title: DEVICE AND METHOD OF DIELECTRIC LAYER
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Application No.: US16053656Application Date: 2018-08-02
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Publication No.: US20190103485A1Publication Date: 2019-04-04
- Inventor: Yu-Yun PENG , Keng-Chu LIN
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/06 ; H01L21/762 ; H01L21/768 ; H01L21/8234 ; H01L21/02 ; H01L21/308
Abstract:
A method includes etching a semiconductor substrate to form a trench extending from a top surface of the semiconductor substrate into the semiconductor substrate. A first liner layer is formed on sidewalls and a bottom of the trench. The trench is filled with a dielectric material after depositing the first liner layer. The dielectric material and the first liner layer include substantially the same metal-contained ternary dielectric material. Excess portions of the dielectric material and the first liner layer over the top surface of the semiconductor substrate are removed.
Public/Granted literature
- US10290739B2 Device and method of dielectric layer Public/Granted day:2019-05-14
Information query
IPC分类:
