Invention Application
- Patent Title: BURIED WORD LINE STRUCTURE AND METHOD OF MAKING THE SAME
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Application No.: US15712133Application Date: 2017-09-21
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Publication No.: US20190067293A1Publication Date: 2019-02-28
- Inventor: Ger-Pin Lin , Kuan-Chun Lin , Chi-Mao Hsu , Shu-Yen Chan , Shih-Fang Tzou , Tsuo-Wen Lu , Tien-Chen Chan , Feng-Yi Chang , Shih-Kuei Yen , Fu-Che Lee
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Priority: CN201710770218.9 20170831
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L21/28

Abstract:
A method of fabricating a buried word line structure includes providing a substrate with a word line trench therein. Two source/drain doped regions are disposed in the substrate at two sides of the word line trench. Later, a silicon oxide layer is formed to cover the word line trench. A titanium nitride layer is formed to cover the silicon oxide layer. Next, a tilt ion implantation process is performed to implant silicon atoms into the titanium nitride layer to transform part of the titanium nitride layer into a titanium silicon nitride layer. A conductive layer is formed in the word line trench. Subsequently, part of the conductive layer, part of the titanium silicon nitride layer and part of the silicon oxide layer are removed to form a recess. Finally, a cap layer fills in the recess.
Public/Granted literature
- US10217750B1 Buried word line structure and method of making the same Public/Granted day:2019-02-26
Information query
IPC分类: