Invention Application
- Patent Title: PLANARIZATION METHOD
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Application No.: US15904405Application Date: 2018-02-25
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Publication No.: US20180277382A1Publication Date: 2018-09-27
- Inventor: Jen-Chieh Lin , Lee-Yuan Chen , Wen-Chin Lin , Chi-Lune Huang , Pi-Hung Chuang , Tai-Lin Chen , Sun-Hong Chen
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Priority: CN201710180563.7 20170324
- Main IPC: H01L21/3105
- IPC: H01L21/3105 ; H01L21/321 ; H01L21/768 ; H01L21/308

Abstract:
A planarization method includes providing a substrate having a semiconductor structure formed thereon. A dielectric layer is formed on the substrate, and a mask layer is formed on the dielectric layer. A first chemical mechanical polishing process is performed to remove a portion of the mask layer thereby forming an opening directly over the semiconductor structure and exposing the dielectric layer. A first etching process is performed to anisotropically remove a portion of the dielectric layer from the opening. The mask layer is then removed and a second chemical mechanical polishing process is then performed.
Public/Granted literature
- US10262869B2 Planarization method Public/Granted day:2019-04-16
Information query
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