Invention Application
- Patent Title: SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
- Patent Title (中): 半导体结构及其制造方法
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Application No.: US14794821Application Date: 2015-07-09
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Publication No.: US20160379839A1Publication Date: 2016-12-29
- Inventor: Chih-Kai Hsu , Yu-Hsiang Hung , Ssu-I Fu , Jyh-Shyang Jenq
- Applicant: UNITED MICROELECTRONICS CORP.
- Priority: TW104120067 20150623
- Main IPC: H01L21/3105
- IPC: H01L21/3105 ; H01L29/06 ; H01L29/78 ; H01L29/66
Abstract:
A method for making a semiconductor device. A substrate having a fin structure is provided. A continuous dummy gate line is formed on the substrate. The dummy gate line strides across the fin structure. A source/drain structure is formed on the fin structure on both sides of the dummy gate line. An interlayer dielectric (ILD) is formed on the dummy gate line and around the dummy gate line. The ILD is polished to reveal a top surface of the dummy gate line. After polishing the ILD, the dummy gate line is segmented into separate dummy gates.
Public/Granted literature
- US09793380B2 Semiconductor structure and fabrication method thereof Public/Granted day:2017-10-17
Information query
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