发明申请
- 专利标题: BIAS TECHNIQUES AND CIRCUIT ARRANGEMENTS TO REDUCE LEAKAGE CURRENT IN A CIRCUIT
- 专利标题(中): 偏置技术和电路安排降低电路中的漏电流
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申请号: US14691461申请日: 2015-04-20
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公开(公告)号: US20150346743A1公开(公告)日: 2015-12-03
- 发明人: Frederic Bossu , Ahmed Abdel Monem Youssef , Tsai-Pi Hung , Prasad Srinivasa Siva Gudem
- 申请人: QUALCOMM Incorporated
- 主分类号: G05F1/46
- IPC分类号: G05F1/46 ; H02H9/04
摘要:
An apparatus includes an input/output (I/O) pin and an electrostatic discharge device. The electrostatic discharge device is coupled to the I/O pin and to a voltage regulator.
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