Invention Application
US20150134870A1 CLOCKING FOR PIPELINED ROUTING 有权
用于管道路由器的时钟

CLOCKING FOR PIPELINED ROUTING
Abstract:
An integrated circuit may have pipelined programmable interconnects that are configured to select between a routing signal stored in a register and the identical routing signal bypassing the register. The pipelined programmable interconnect may send the selected routing signal over a wire to the next pipelined programmable interconnect circuitry. The integrated circuit may also have clock routing circuitry to select respective clock signals for the registers in the different pipelined programmable interconnects. The clock routing circuitry may include first interconnects that convey region clocks, second interconnects that conveys routing clocks, a first selector circuit to select routing clocks among the region clocks, and a second selector circuit to select routing clocks for the respective registers.
Public/Granted literature
Information query
Patent Agency Ranking
0/0