Invention Application
US20150100754A1 DATA PROCESSING APPARATUS AND METHOD FOR PERFORMING SPECULATIVE VECTOR ACCESS OPERATIONS 有权
数据处理装置和执行分布式矢量访问操作的方法

  • Patent Title: DATA PROCESSING APPARATUS AND METHOD FOR PERFORMING SPECULATIVE VECTOR ACCESS OPERATIONS
  • Patent Title (中): 数据处理装置和执行分布式矢量访问操作的方法
  • Application No.: US14462194
    Application Date: 2014-08-18
  • Publication No.: US20150100754A1
    Publication Date: 2015-04-09
  • Inventor: Alastair David REIDDaniel KERSHAW
  • Applicant: ARM LIMITED
  • Priority: GB1317874.4 20131009
  • Main IPC: G06F15/78
  • IPC: G06F15/78 G06F9/30
DATA PROCESSING APPARATUS AND METHOD FOR PERFORMING SPECULATIVE VECTOR ACCESS OPERATIONS
Abstract:
A data processing apparatus and method for performing speculative vector access operations are provided. The data processing apparatus has a reconfigurable buffer accessible to vector data access circuitry and comprising a storage array for storing up to M vectors of N vectors elements. The vector data access circuitry performs speculative data write operations in order to cause vector elements from selected vector operands in a vector register bank to be stored into the reconfigurable buffer. On occurrence of a commit condition, the vector elements currently stored in the reconfigurable buffer are then written to a data store. Speculation control circuitry maintains a speculation width indication indicating the number of vector elements of each selected vector operand stored in the reconfigurable buffer. The speculation width indication is initialised to an initial value, but on detection of an overflow condition within the reconfigurable buffer the speculation width indication is modified to reduce the number of vector elements of each selected vector operand stored in the reconfigurable buffer. The reconfigurable buffer then responds to a change in the speculation width indication by reconfiguring the storage array to increase the number of vectors M and reduce the number of vector elements N per vector. This provides an efficient mechanism for supporting performance of speculative data write operations.
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