Invention Application
US20130246709A1 TRANSLATION ADDRESS CACHE FOR A MICROPROCESSOR 审中-公开
微处理器的翻译地址缓存

TRANSLATION ADDRESS CACHE FOR A MICROPROCESSOR
Abstract:
Embodiments related to fetching instructions and alternate versions achieving the same functionality as the instructions from an instruction cache included in a microprocessor are provided. In one example, a method is provided, comprising, at an example microprocessor, fetching an instruction from an instruction cache. The example method also includes hashing an address for the instruction to determine whether an alternate version of the instruction which achieves the same functionality as the instruction exists. The example method further includes, if hashing results in a determination that such an alternate version exists, aborting fetching of the instruction and retrieving and executing the alternate version.
Public/Granted literature
Information query
Patent Agency Ranking
0/0