发明申请
- 专利标题: Recovering from an Error in a Fault Tolerant Computer System
- 专利标题(中): 在容错计算机系统中从错误中恢复
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申请号: US12859842申请日: 2010-08-20
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公开(公告)号: US20110047364A1公开(公告)日: 2011-02-24
- 发明人: Toshihiko Koju , Takuya Nakaike
- 申请人: Toshihiko Koju , Takuya Nakaike
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 优先权: JP2009-193089 20090824
- 主分类号: G06F9/38
- IPC分类号: G06F9/38
摘要:
A leading thread and a trailing thread are executed in parallel. Assuming that no transient fault occurs in each section, a system is speculatively executed in the section, with the leading thread and the trailing thread preferably being assigned to two different cores. At this time, the leading thread and the trailing thread are simultaneously executed, performing a buffering operation on a thread local area without performing a write operation on a shared memory. When the respective execution results of the two threads match each other, the content buffered to the thread local area is committed and written to the shared memory. When the respective execution results of the two threads do not match each other, the leading thread and the trailing thread are rolled back to a preceding commit point and re-executed.
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