Invention Grant
- Patent Title: Manufacturing method of semiconductor package
-
Application No.: US18190935Application Date: 2023-03-27
-
Publication No.: US12176282B2Publication Date: 2024-12-24
- Inventor: Chung-Ming Weng , Chen-Hua Yu , Chung-Shi Liu , Hao-Yi Tsai , Cheng-Chieh Hsieh , Hung-Yi Kuo , Tsung-Yuan Yu , Hua-Kuei Lin , Hsiu-Jen Lin , Ming-Che Ho , Yu-Hsiang Hu , Chewn-Pu Jou , Cheng-Tse Tang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/498
- IPC: H01L23/498 ; G02B6/42 ; H01L21/768 ; H01L23/00

Abstract:
A manufacturing method of a semiconductor package includes the following steps. A supporting layer is formed over a redistribution structure. A first planarization process is performed over the supporting layer. A lower dielectric layer is formed over the supporting layer, wherein the lower dielectric layer includes a concave exposing a device mounting region of the supporting layer. A first sacrificial layer is formed over the supporting layer, wherein the sacrificial layer filling the concave. A second planarization process is performed over the lower dielectric layer and the first sacrificial layer. A transition waveguide provided over the lower dielectric layer. The first sacrificial layer is removed. A semiconductor device is mounted over the device mounting region, wherein the semiconductor device includes a device waveguide is optically coupled to the transition waveguide.
Public/Granted literature
- US20230245967A1 MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE Public/Granted day:2023-08-03
Information query
IPC分类: