- 专利标题: Formation of metal vias on metal lines
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申请号: US17184020申请日: 2021-02-24
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公开(公告)号: US12113020B2公开(公告)日: 2024-10-08
- 发明人: Ryan Scott Smith , Kai Wu , Nicolas Louis Gabriel Breil
- 申请人: Applied Materials, Inc.
- 申请人地址: US CA Santa Clara
- 专利权人: Applied Materials, Inc.
- 当前专利权人: Applied Materials, Inc.
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Kilpatrick Townsend & Stockton LLP
- 主分类号: H01L23/532
- IPC分类号: H01L23/532 ; H01L21/02 ; H01L21/768 ; H01L23/522 ; H01L23/528
摘要:
Exemplary semiconductor processing methods include forming a via in a semiconductor structure. The via may be defined in part by a bottom surface and a sidewall surface formed in the semiconductor structure around the via. The methods may also include depositing a tantalum nitride (TaN) layer on the bottom surface of the via. In embodiments, the TaN layer may be deposited at a temperature less than or about 200° C. The methods may still further include depositing a titanium nitride (TiN) layer on the TaN layer. In embodiments, the TiN layer may be deposited at a temperature greater than or about 300° C. The methods may additionally include depositing a fill-metal on the TiN layer in the via. In embodiments, the metal may be deposited at a temperature greater than or about 300° C.
公开/授权文献
- US20220270979A1 FORMATION OF METAL VIAS ON METAL LINES 公开/授权日:2022-08-25
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