Invention Grant
- Patent Title: Structures and methods for trench isolation
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Application No.: US16665791Application Date: 2019-10-28
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Publication No.: US11894381B2Publication Date: 2024-02-06
- Inventor: Kuan-Jung Chen , Tsung-Lin Lee , Chung-Ming Lin , Wen-Chih Chiang , Cheng-Hung Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/74 ; H01L23/535

Abstract:
Structures and methods for trench isolation are disclosed. In one example, a silicon-on-insulator (SOI) structure is disclosed. The SOI structure includes: a substrate, a dielectric layer and a polysilicon region. The substrate includes: a handle layer, an insulation layer arranged over the handle layer, a buried layer arranged over the insulation layer, and a trench extending downward from an upper surface of the buried layer and terminating in the handle layer. The dielectric layer is located on a bottom surface of the trench and contacting the handle layer. The polysilicon region is located in the trench and contacting the dielectric layer.
Public/Granted literature
- US20200161335A1 STRUCTURES AND METHODS FOR TRENCH ISOLATION Public/Granted day:2020-05-21
Information query
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