Invention Grant
- Patent Title: Implant to form vertical FETs with self-aligned drain spacer and junction
-
Application No.: US17167892Application Date: 2021-02-04
-
Publication No.: US11640987B2Publication Date: 2023-05-02
- Inventor: Andrew Michael Waite
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: KDW Firm PLLC
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/311 ; H01L21/265

Abstract:
Disclosed herein are methods for forming vertical field-effect-transistor (vFET). In some embodiments, a method includes providing a device structure including a plurality of pillars extending from a base layer, forming a capping layer over the device structure, and forming a drain in an upper section of each of the plurality of pillars by performing an angled implant to each of the plurality of pillars. The angled implant may be delivered at a non-zero angle of inclination relative to a perpendicular extending from a top surface of the base layer. The method may further include etching the device structure to remove the capping layer from along a lower section of each of the plurality of pillars, wherein the capping layer remains along the upper section of each of the plurality of pillars.
Public/Granted literature
- US20220246746A1 IMPLANT TO FORM VERTICAL FETS WITH SELF-ALIGNED DRAIN SPACER AND JUNCTION Public/Granted day:2022-08-04
Information query
IPC分类: