- 专利标题: Vertical diode in stacked transistor architecture
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申请号: US16649712申请日: 2018-01-18
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公开(公告)号: US11616056B2公开(公告)日: 2023-03-28
- 发明人: Aaron D. Lilak , Patrick Morrow , Anh Phan , Cheng-Ying Huang , Rishabh Mehandru , Gilbert Dewey , Willy Rachmady
- 申请人: INTEL CORPORATION
- 申请人地址: US CA Santa Clara
- 专利权人: INTEL CORPORATION
- 当前专利权人: INTEL CORPORATION
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Schwabe, Williamson & Wyatt, P.C.
- 国际申请: PCT/US2018/014267 WO 20180118
- 国际公布: WO2019/143340 WO 20190725
- 主分类号: H01L27/06
- IPC分类号: H01L27/06 ; H01L21/8252 ; H01L27/092 ; H01L29/20 ; H01L29/205 ; H01L29/66 ; H01L29/778 ; H01L29/861
摘要:
An integrated circuit structure includes a first semiconductor fin extending horizontally in a length direction and including a bottom portion and a top portion above the bottom portion, a bottom transistor associated with the bottom portion of the first semiconductor fin, a top transistor above the bottom transistor and associated with the top portion of the first semiconductor fin, and a first vertical diode. The first vertical diode includes: a bottom region associated with at least the bottom portion of the first semiconductor fin, the bottom region including one of n-type and p-type dopant; a top region associated with at least the top portion of the first semiconductor fin, the top region including the other of n-type and p-type dopant; a bottom terminal electrically connected to the bottom region; and a top terminal electrically connected to the top region at the top portion of the first semiconductor fin.
公开/授权文献
- US20200258881A1 VERTICAL DIODE IN STACKED TRANSISTOR ARCHITECTURE 公开/授权日:2020-08-13
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