Invention Grant
- Patent Title: Semiconductor packages having thermal conductive patterns surrounding the semiconductor die
-
Application No.: US17168186Application Date: 2021-02-05
-
Publication No.: US11562941B2Publication Date: 2023-01-24
- Inventor: Jing-Cheng Lin , Szu-Wei Lu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/40
- IPC: H01L23/40 ; H01L23/433 ; H01L21/56 ; H01L23/00 ; H01L23/367 ; H01L25/10 ; H01L25/18 ; H01L23/31

Abstract:
A semiconductor package includes a semiconductor die, a first thermal conductive pattern and a second thermal conductive pattern. The semiconductor die is encapsulated by an encapsulant. The first thermal conductive pattern is disposed aside the semiconductor die in the encapsulant. The second thermal conductive pattern is disposed over the semiconductor die, wherein the first thermal conductive pattern is thermally coupled to the semiconductor die through the second thermal conductive pattern and electrically insulated from the semiconductor die.
Public/Granted literature
- US20210159147A1 SEMICONDUCTOR PACKAGES Public/Granted day:2021-05-27
Information query
IPC分类: