- 专利标题: Transistors on heterogeneous bonding layers
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申请号: US16222946申请日: 2018-12-17
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公开(公告)号: US11532719B2公开(公告)日: 2022-12-20
- 发明人: Kimin Jun , Jack T. Kavalieros , Gilbert Dewey , Willy Rachmady , Aaron Lilak , Brennen Mueller , Hui Jae Yoo , Patrick Morrow , Anh Phan , Cheng-Ying Huang , Ehren Mannebach
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Schwabe, Williamson & Wyatt, P.C.
- 主分类号: H01L29/423
- IPC分类号: H01L29/423 ; H01L29/66 ; H01L29/49 ; H01L29/45 ; H01L29/786 ; H01L21/762 ; H01L21/02 ; H01L29/06
摘要:
Embodiments herein describe techniques for a semiconductor device over a semiconductor substrate. A first bonding layer is above the semiconductor substrate. One or more nanowires are formed above the first bonding layer to be a channel layer. A gate electrode is around a nanowire, where the gate electrode is in contact with the first bonding layer and separated from the nanowire by a gate dielectric layer. A source electrode or a drain electrode is in contact with the nanowire, above a bonding area of a second bonding layer, and separated from the gate electrode by a spacer, where the second bonding layer is above and in direct contact with the first bonding layer.
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