- 专利标题: Capacitor die for stacked integrated circuits
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申请号: US16870176申请日: 2020-05-08
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公开(公告)号: US11532592B2公开(公告)日: 2022-12-20
- 发明人: David C. Zhang , Pranav Balachander
- 申请人: WESTERN DIGITAL TECHNOLOGIES, INC.
- 申请人地址: US CA San Jose
- 专利权人: WESTERN DIGITAL TECHNOLOGIES, INC.
- 当前专利权人: WESTERN DIGITAL TECHNOLOGIES, INC.
- 当前专利权人地址: US CA San Jose
- 代理机构: Vierra Magen Marcus LLP
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L23/538 ; H01L23/66 ; H05K1/02 ; H01L23/522
摘要:
An apparatus is provided that includes a die stack having a first die and a second die disposed above a substrate, and a capacitor die disposed in the die stack between the first die and the second die. The capacitor die includes a plurality of integrated circuit capacitors that are configured to be selectively coupled together to form a desired capacitor value coupled to at least one of the first die and the second die.
公开/授权文献
- US20210351152A1 CAPACITOR DIE FOR STACKED INTEGRATED CIRCUITS 公开/授权日:2021-11-11
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