- 专利标题: Semiconductor apparatus and potential measuring apparatus
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申请号: US16343611申请日: 2017-11-17
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公开(公告)号: US11492722B2公开(公告)日: 2022-11-08
- 发明人: Masahiro Sato , Machiko Kametani , Jun Ogi , Yuri Kato
- 申请人: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- 申请人地址: JP Kanagawa
- 专利权人: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- 当前专利权人: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- 当前专利权人地址: JP Kanagawa
- 代理机构: Chip Law Group
- 优先权: JPJP2016-235131 20161202
- 国际申请: PCT/JP2017/041417 WO 20171117
- 国际公布: WO2018/101076 WO 20180607
- 主分类号: C25D21/12
- IPC分类号: C25D21/12 ; G01N27/30 ; G01R29/12 ; H03F1/52 ; G01N33/487 ; G01N27/416
摘要:
The present disclosure relates to a semiconductor apparatus and a potential measuring apparatus capable of preventing deterioration in signal characteristics due to parasitic capacitance caused by providing a configuration for realizing an electrode plating process when an electrode and an amplifier are provided on the same substrate. When a power source supplies a potential necessary for plating processing and a breaker reads a signal from liquid, and an amplifier amplifies and outputs the signal, the power source required for the plating processing is blocked with respect to the electrode. This is applicable to the potential measuring apparatus.
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