- 专利标题: Forming a semiconductor feature using atomic layer etch
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申请号: US16851414申请日: 2020-04-17
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公开(公告)号: US11424123B2公开(公告)日: 2022-08-23
- 发明人: Eric Chih-Fang Liu , Akiteru Ko , Angelique Raley , Henan Zhang , Shan Hu , Subhadeep Kal
- 申请人: Tokyo Electron Limited
- 申请人地址: JP Tokyo
- 专利权人: Tokyo Electron Limited
- 当前专利权人: Tokyo Electron Limited
- 当前专利权人地址: JP Tokyo
- 代理机构: Slater Matsil, LLP
- 主分类号: H01L21/033
- IPC分类号: H01L21/033 ; H01L21/027 ; H01L21/311 ; H01L21/306 ; H01L21/3213 ; H01L21/67 ; H01L21/3065
摘要:
In certain embodiments, a method of forming a semiconductor device includes forming a patterned resist layer over a hard mask layer using an extreme ultraviolet (EUV) lithography process. The hard mask layer is disposed over a substrate. The method includes patterning the hard mask layer using the patterned resist layer as an etch mask. The method includes smoothing the hard mask layer by forming, using a first atomic layer etch step, a first layer by converting a first portion of the hard mask layer, and by removing, using a second atomic layer etch step, the first layer.
公开/授权文献
- US20210265164A1 FORMING A SEMICONDUCTOR FEATURE USING ATOMIC LAYER ETCH 公开/授权日:2021-08-26
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